A PROOF-OF-CONCEPT DIGITAL LEAKY INTEGRATE-AND-FIRE NEURAL NETWORK - THE CAT DESIGN
DOI:
https://doi.org/10.63001/tbs.2025.v20.i02.S2.pp04-10Keywords:
Neural Network, Digital Neural Nets, Leaky Integrate-and-Fire, VLSI, Address- Event Representation (AER), NeuromorphicAbstract
Digital neural networks are an alternative computing structure to the traditional von Neumann architecture and offer enhanced performance when many inputs need to be processed in parallel. This occurs in complex data sets or data sets composed of sensory (e.g. visual or auditory) information. Neural networks inspired by biological systems offer efficient solutions for real-time signal processing, pattern recognition, and neuromorphic computing. This paper presents a proof-of-concept digital implementation of a Leaky Integrate-and-Fire (LIF) neural network, designed and tested in hardware using FPGA-based digital logic. The proposed architecture, termed CAT Design, leverages a scalable and modular approach to implement LIF neurons with configurable parameters such as membrane potential decay, threshold-based firing, and synaptic weight adjustments. By employing efficient digital arithmetic and parallel processing techniques, the design achieves low-latency spike-based computation, making it suitable for energy-efficient neuromorphic applications. We evaluate the performance of the system in terms of computational efficiency, hardware resource utilization, and real-time processing capabilities. The results demonstrate the feasibility of implementing spiking neural networks in digital hardware, paving the way for future developments in brain-inspired computing systems.
This paper presents the results from testing a small proof-of-concept digital neural network designed in VLSI hardware.